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Fujiwara, Eiji

Code Design for Dependable Systems

Theory and Practical Applications

€ 254.95

Written from an engineering standpoint with a focus on practical codes based on their performance and hardware complexit, Matrix Code Design for Dependable Systems emphasizes matrix codes and how they are manipulated. Unlike existing coding theory books, this book does not burden the reader with unnecessary mathematics for polynomial codes.


Taal / Language : English

Inhoudsopgave:
Preface.

1. Introduction.

1.1 Faults and Failures.

1.2 Error Models.

1.3 Error Recovery Techniques for Dependable Systems.

1.4 Code Design Process for Dependable Systems.

References.

2. Mathematical Background and Matrix Codes.

2.1 Introduction to Algebra.

2.2 Linear Codes.

2.3 Basic Matrix Codes.

Exercises.

References.

3. Design Techniques for Matrix Codes.

3.1 Minimum Weight & Equal Weight Row Codes.

3.2 Odd Weight Column Codes.

3.3 Even Weight Row Codes.

3.4 Odd Weight Row Codes.

3.5 Rotational Codes.

Exercises.

References.

4. Codes for High Speed Memories I: Bit Error Control Codes.

4.1 Modified Hamming SEC DED Codes.

4.2 Modified Double Bit Error Correcting BCH Codes.

4.3 On Chip ECCs.

Exercises.

References.

5. Codes for High Speed Memories II: Byte Error Control Codes.

5.1 Single Byte Error Correcting (SbEC) Codes.

5.2 Single Byte Error Correcting and Double Byte Error Detecting (SbEC DbED) Codes.

5.3 Single Byte Error Correcting and Single p Byte within a Block Error Detecting (SbEC Spb=BED) Codes.

Exercises.

References.

6. Codes for High Speed Memories III: Bit / Byte Error Control Codes.

6.1 Single Byte / Burst Error Detecting SEC DED Codes.

6.2 Single Byte Error Correcting and Double Bit Error Detecting (SbEC DED) Codes.

6.3 Single Byte Error Correcting and Double Bit Error Correcting (SbEC DEC) Codes.

6.4 Single Byte Error Correcting and Single Byte Plus Single Bit Error Detecting (SbEC (SbþS)ED) Codes.

Exercises.

References.

7. Codes for High Speed Memories IV: Spotty Byte Error Control Codes.

7.1 Spotty Byte Errors.

7.2 Single Spotty Byte Error Correcting (St=bEC) Codes.

7.3 Single Spotty Byte Error Correcting and Single Byte Error Detecting (St=bEC SbED) Codes.

7.4 Single Spotty Byte Error Correcting and Double Spotty Byte Error Detecting (St=bEC Dt=bED) Codes.

7.5 A General Class of Spotty Byte Error Control Codes.

Exercises.

References.

8. Paralled Decoding for Burst / Byte Error Control Codes.

8.1 Parallel Decoding Burst Error Control Codes.

8.2 Parallel Decoding Cyclic Burst Error Correcting Codes.

8.3 Transient Behavior of Parallel Encoder / Decoder Circuits of Error Control Codes.

Exercises.

References.

9. Codes for Error Location: Error Locating Codes.

9.1 Error Location of Faulty Packages and Faulty Chips.

9.2 Block Error Locating (Sb=pbEL) Codes.

9.3 Single Bit Error Correcting and Single Block Error Locating (SEC Sb=pbEL) Codes.

9.4 Single Bit Error Correcting and Single Byte Error Locating (SEC Se=bEL) Codes.

9.5 Burst Error Locating Codes.

9.6 Code Conditions for Error Locating Codes.

10. Codes for Unequal Error Control / Protection (UEC / UEP).

10.1 Error Models for UEC Codes and UEP Codes.

10.2 Fixed Byte Error Control UEC Codes.

10.3 Burst Error Control UEC / UEP Codes.

10.4 Application of the UEC / UEP Codes.

Exercises.

References.

11. Codes for Mass Memories.

11.1 Tape Memory Codes.

11.2 Magnetic Disk Memory Codes.

11.3 Optical Disk Memory Codes.

Exercises.

References.

12. Coding for Logic and System Design.

12.1 Self checking Concept.

12.2 Self testing Checkers.

12.3 Self checking ALU.

12.4 Self checking Design for Computer Systems.

Exercises.

References.

13. Codes for Data Entry Systems.

13.1 M Ary Asymmetric Errors in Data Entry Systems.

13.2 M Ary Asymmetric Symbol Error Correcting Codes.

13.3 Nonsystematic M Ary Asymmetric Error Correcting Codes with Deletion / Insertion / Adjacent Symbol Transposition Error Correction Capabilities.

13.4 Codes for Two Dimentional Matrix Symbols.

Exercises.

References.

14. Codes for Multiple / Distributed Storage Systems.

14.1 MDS Array Codes Tolerating Multiple Disk Failures.

14.2 Codes for Distributed Storage Systems.

Exercises.

References.

Index.
Extra informatie: 
Hardback
720 pagina's
Januari 2006
1354 gram
253 x 183 x 41 mm
Wiley-Blackwell us

Levertijd: 5 tot 11 werkdagen